1. Field of the Invention
This invention relates generally to electrical circuits for the control of dead time in switching circuits, and more particularly to a power MOSFET designed for such control.
2. Description of Related Art
The following art defines the present state of this field:
The prior art teaches that in high efficiency switch-mode power systems and amplifiers using PMOS and NMOS transistors, if both are switched on at the same time there will be a conduction path between them which can result in degraded efficiency, degraded fidelity, and even destruction of the transistors. Therefore, a minimum, or near zero, dead time is introduced between the turn-on cycles of the two devices to ensure that no such conduction path exists. However, this may lead to inefficient operation and distortion. The prior art does not teach the direct control, through feedback, of an arbitrarily chosen dead time introduced into circuit operation to maximize performance. The present invention fulfills these needs and provides further related advantages as described in the following summary.